Voltage Divider Equation: Derivation and Applications

Why the Voltage Divider Deserves Your Attention

Of all the patterns in circuit analysis, the voltage divider is the one you will reach for most often. Two impedances in series across a source, output tapped from the middle, and a single ratio tells you the result. It hides inside transistor bias networks, op-amp feedback paths, sensor front-ends, attenuators, and the input stage of nearly every measuring instrument. Learning to recognize a divider on sight, and to know when its simple formula breaks down, is one of the highest-leverage skills in practical electronics. This article derives the equation carefully, puts real numbers through it, and then examines the loading effect that trips up most beginners.

Derivation from KVL and Ohm's Law

Place two resistors $R_1$ and $R_2$ in series across a source $V_{in}$, with the output $V_{out}$ measured across $R_2$. Because the two resistors share a single loop, the same current $I$ flows through both. By KVL around that loop:

Solving for the loop current gives $I = V_{in}/(R_1 + R_2)$, and the output voltage is the drop across $R_2$:

That ratio, $R_2/(R_1 + R_2)$, is always between 0 and 1, so a voltage divider can only attenuate, never amplify. The output is the input scaled by the fraction of total resistance that appears across the output element. This rests entirely on Ohm's law and the series-current observation, nothing more.

A Fully Worked Numerical Example

Let $R_1 = 10\ \text{k}\Omega$, $R_2 = 4.7\ \text{k}\Omega$, and $V_{in} = 12\ \text{V}$. The total series resistance is $10 + 4.7 = 14.7\ \text{k}\Omega$, so:

The current drawn from the source is $I = 12 / 14700 \approx 0.816\ \text{mA}$, and you can sanity-check the output as $I R_2 = 0.816\ \text{mA} \times 4.7\ \text{k}\Omega \approx 3.84\ \text{V}$, which matches. The power dissipated in the divider is $V_{in} I = 12 \times 0.816\ \text{mA} \approx 9.8\ \text{mW}$, a useful number when you are choosing resistor ratings or worrying about battery drain in a low-power design.

The Generalized Impedance Divider

In the $s$-domain the derivation is identical with impedances replacing resistances:

This is the starting point for every passive filter. An RC low-pass filter is a divider with $Z_1 = R$ and $Z_2 = 1/(sC)$, yielding $H(s) = \frac{1}{1 + sRC}$. Swap the elements and you get a high-pass response. The same one-line ratio describes both, which is the beauty of working with impedances.

The Loading Effect

The clean formula assumes no current is drawn from the output node. The moment you connect a real load, that assumption fails. If a load $R_L$ hangs across $R_2$, the effective lower resistance becomes the parallel combination:

and the loaded output is $V_{out} = V_{in}\,\dfrac{R_{2,\text{eff}}}{R_1 + R_{2,\text{eff}}}$. Continuing the example with a $R_L = 10\ \text{k}\Omega$ load: $R_{2,\text{eff}} = (4.7 \times 10)/(4.7 + 10) = 47/14.7 \approx 3.20\ \text{k}\Omega$. The new output is:

The output sagged from 3.84 V to 2.91 V, a 24% error, just from connecting a load comparable in size to $R_2$. The loading effect always pulls the output down. It becomes negligible only when $R_L \gg R_2$, which is why a well-designed divider feeding a sensitive node is often buffered by an op-amp follower whose input impedance is effectively infinite. The table below shows how the error shrinks as the load grows relative to $R_2 = 4.7\ \text{k}\Omega$.

Output Resistance of a Divider

Why does the divider sag under load? Look at it from the load's point of view. With the source replaced by its internal short (the standard way to find a Thevenin equivalent), the impedance seen looking back into the tap is $R_1$ in parallel with $R_2$. That parallel value is the divider's output resistance, and it is what forms a second, unwanted divider with any load you attach. For the running example, $R_{out} = R_1 \parallel R_2 = (10 \cdot 4.7)/14.7 \approx 3.20\ \text{k}\Omega$. A load of 10 kΩ then sees a 3.20 kΩ source resistance in series with it, and the resulting drop is exactly the 24% sag computed above. Thinking of the divider as a Thevenin source, an open-circuit voltage of 3.84 V behind 3.20 kΩ, makes the loading effect intuitive rather than mysterious, and it connects the topic to source-equivalent reasoning more broadly.

This is also the reason a buffered divider is so common. An op-amp voltage follower presents an input resistance in the megohms or higher, so the loading term $R_L \gg R_2$ is satisfied by an enormous margin and the tap delivers its ideal 3.84 V. The follower then sources whatever current the downstream stage needs from its own output, decoupling the divider from the load entirely. Whenever you see a divider feeding directly into a high-impedance amplifier input, that is the designer relying on exactly this output-resistance argument.

Applications

In BJT amplifier design, a divider sets the base bias voltage; the resistors are sized so the base current (the load) is roughly a tenth of the divider current, keeping the operating point stable. Resistive sensors such as thermistors and photoresistors form one leg of a divider so that resistance changes become voltage changes an ADC can read. And a precision divider from a regulated rail makes a reference voltage for comparators, usually buffered to eliminate loading. A practical rule: choose the divider's standing current to be at least ten times the expected load current, and the loaded output will stay within about 10% of the ideal value.

Common Mistakes

• Applying the ideal formula to a loaded divider. If anything draws current from the tap, you must fold the load into $R_{2,\text{eff}}$ first.
• Putting $R_1$ in the numerator. The output element's resistance goes on top. The numerator is always the impedance the output is measured across.
• Assuming a divider can source meaningful current. Its output impedance is $R_1 \parallel R_2$; pull too hard and the voltage collapses, as the table shows.
• Using huge resistors to save power. Very large $R_1, R_2$ make the divider extremely sensitive to loading and to leakage or input-bias currents.

Choosing Resistor Values in Practice

Designing a divider is a balancing act between three competing concerns: accuracy under load, power consumption, and immunity to stray currents. Make the resistors too large and the standing current becomes comparable to leakage currents, op-amp input bias currents, or the picoamp-scale currents that flow through a multimeter probe, all of which corrupt the output. Make them too small and the divider wastes power continuously, which matters enormously in a battery-powered design where a 9.8 milliwatt divider running around the clock dwarfs the consumption of a sleeping microcontroller. The usual compromise targets a standing current that is large compared with any load or leakage current yet small compared with the supply's budget, and then rounds the calculated resistances to the nearest standard E12 or E24 values. After rounding, always recompute the actual ratio, since a divider built from 10 kΩ and 4.7 kΩ ideal values may use 4.7 kΩ and 10 kΩ parts whose 5% tolerance shifts the output by a few percent on its own.

Tolerance stacking deserves a moment of thought. If both resistors carry a 1% tolerance, the worst-case output ratio can drift by roughly the sum of the two tolerances in the unfavorable direction, so a 1% pair yields roughly 2% worst-case ratio error. For precision references this is why designers reach for 0.1% parts or for matched resistor networks fabricated on a single die, where the two resistors track each other with temperature far better than two discrete parts ever could. The divider ratio depends only on the matching of the resistors, not their absolute value, which is a genuinely useful fact: a poorly characterized but well-matched pair still divides accurately.

For the parallel-circuit counterpart, see the current divider equation.