The Common-Emitter Amplifier
The common-emitter (CE) stage is the workhorse of bipolar amplifier design and the first amplifier topology every analog course studies in depth. It delivers high voltage gain, a moderate input resistance set by , and an output that is inverted with respect to the input. Understanding the CE stage cold is the prerequisite for everything that follows — differential pairs, cascodes, gain stages inside op-amps. In this tutorial we take the stage apart with the hybrid-pi model, derive the gain and impedances from KVL and KCL, add emitter degeneration to see how it trades gain for linearity, and finish with a complete numerical example. If you have not yet met the device model, read the BJT small-signal model first, since we use , , and freely below.
Setting Up the Small-Signal Circuit
Start with a CE stage: input applied through a coupling capacitor to the base, emitter at AC ground, collector tied to through a collector resistor , output taken at the collector. To analyze the signal behavior we kill the DC supply (short to ground), treat the coupling and bypass capacitors as shorts at midband, and replace the transistor with its hybrid-pi equivalent: from base to emitter, the current source from collector to emitter, and in parallel.
With the emitter at AC ground, the controlling voltage is simply the input, . KCL at the collector node sums the current pulled by the transconductance source, the current through , and the current through . Because the dependent source draws current from the collector into the device, the output swings opposite to the input — this is the origin of the minus sign in the gain.
Voltage Gain Without Degeneration
The output voltage equals the controlled current times the total resistance seen at the collector, which is in parallel with . Carrying the sign through:
If you neglect the Early effect (let ), this collapses to the textbook approximation . The negative sign is not optional bookkeeping — it tells you the CE stage is inverting, a fact that matters when you close a feedback loop around it.
Input and Output Resistance
Looking into the base, an undegenerated CE stage presents (in parallel with any bias resistors). Looking back into the collector, with the input source set to zero so and the dependent source is off, you see only ; including the external load the output resistance of the stage is
The moderate input resistance is the CE stage's main weakness — it loads the previous stage. The high (inverting) gain is its main strength.
Emitter Degeneration
Insert an unbypassed resistor in the emitter leg. Now the emitter is no longer at AC ground; part of the input is dropped across , providing series-series local feedback. Neglecting , the gain becomes
When , this simplifies to the remarkably robust result , a gain set entirely by a ratio of resistors and independent of the bias-dependent . You pay for this stability with reduced gain, but you gain wider bandwidth, lower distortion, and a much higher input resistance:
The term is the emitter resistor reflected into the base — the same current-gain factor that distinguishes from .
The Physical Intuition Behind the Gain
Before plugging in numbers, it helps to see why the gain takes the form it does. A small change in produces a proportionally larger change in collector current through ; that current then flows through the collector resistance and is converted into an output voltage. The amplifier is, at heart, a transconductance followed by a current-to-voltage conversion. This is why the gain is a product of and a resistance rather than a simple resistor ratio — and why a transistor biased at higher current (larger ) gives more gain into the same load. The inversion arises because increasing the input pulls more current through the collector, dragging the collector voltage down toward ground.
Emitter degeneration changes this story in an instructive way. By leaving a resistor in the emitter, the signal current must develop a voltage across that subtracts from the input, so only a fraction of actually appears across the base-emitter junction. This is negative feedback in its most direct form: the stage opposes its own input. The benefit is that the gain becomes nearly independent of the transistor's exact , which drifts with temperature and varies from device to device. Trading raw gain for predictability is one of the most common and important bargains in all of analog design, and the CE stage is where most engineers first encounter it.
It is also worth noting how the common-emitter stage fits into larger systems. Its inverting, high-gain behavior makes it the natural gain element inside operational-amplifier signal paths and the active device in many feedback loops. Its moderate input resistance, set by , means it is usually preceded by a buffer or driven from a low-impedance source so that the loading does not erode the signal. Recognizing these system-level consequences of the small-signal parameters — not just memorizing the gain formula — is what turns the CE stage from a homework exercise into a design tool.
A Fully Worked Numerical Example
Bias an NPN at with , ,, and . From the device model:
The undegenerated gain, keeping the Early effect, is
Dropping would give — only a 5% error here, so the approximation is acceptable for this small . Now add an unbypassed . Since :
Degeneration cut the gain from −200 to about −18 (close to the resistor ratio ), but the input resistance jumped from to , more than ten times larger. That is the degeneration bargain in one line of arithmetic.
Summary: CE Stage With and Without Degeneration
| Quantity | Undegenerated | With R_E (unbypassed) |
|---|---|---|
| Voltage gain | ||
| Input resistance | ||
| Output resistance | Higher (degeneration boosts ) | |
| Example gain (above) | −190 | −18.2 |
Common Mistakes
- Losing the minus sign. The CE stage is inverting. Reporting a positive gain is a sign error that will haunt any feedback analysis.
- Forgetting that a bypassed is a short. If a large bypass capacitor sits across , the emitter is at AC ground and the gain is the full — the degeneration formula does not apply at midband.
- Using in the input-resistance formula. Input resistance into the base uses and reflects by , not by 1.
- Ignoring with an active load. With a current-source load comparable to , you must keep it or the gain blows up to nonsense.
- Mixing DC and AC. Solve the DC bias for first, then build the small-signal circuit with sources killed. Do not carry DC supply voltages into the gain equations.
Once the CE stage is clear, compare it with its FET cousin in the common-source amplifier tutorial, then see how stacking two transistors boosts output resistance in the cascode analysis. You can also sketch the stage in the CircuitMath editor and have the KVL/KCL equations generated for you.